Digital subsystems with different supply voltages have to align their logical states if they want to talk to each other. It can be done with variety of discreet components as well as dedicated integrated circuits. It is simple task these days with google. Things get trickier if one side needs to be powered off, to save energy for a start. Testing each case scenario with breadboards gives early warnings if something is wrong. I was just too brave skipping this scenario. Hit back by nasty problem I had to develop new skill: patching hardware. Literally.
From many different discreet voltage converters I like most a triplet of P-MOSFET and two resistors. It is flexible approach: bidirectional communication that works with different voltage levels using the same values of components. Switching speed depends on transistor properties combined with pullup-transistor RC timing: in my case switching with speed below megahertz was working seamlesly.
The only drawback was space and in most cases I needed at least 3 lines to single subsystem. Some time ago I found dirt cheap NC7WZ07 voltage converter in SC70 case, smaller than single transistor (1.25 x 2 mm). Huge space-saver and pain in the ass with manual soldering on home-made PCB. This ultra-high speed converter works in open-drain configuration so it still requires pullups on output end. I gave it a try and was working fine in MCU-GSM setup.
Tiny NC7WZ07 case on MSOP pads
Converter pullups 47k (left) 4k3 (right)
At that stage I have built a SPI connectivity between 5V peripherals and 3.3V MCU as show on the picture. Using default high value pullups I found clock wave massively distorted, probably due to high RC constans value; replacing R15/R16 with order of magnitude lower values improved slew rate and signals started flowing through with near megahertz clock speed.
After I have introduced power-down firmware feature to SPI slave part (UC6 on the drawing) I felt into much serious trouble. Clock and data lines are shared with SD memory card and after power-down SD was not responsive at all. DSO shown that clock line was fine but data (MISO) line was hold low. I discovered that U6 powered-down is not high-impendance but shorted to ground. To make things even worse, VCC of 5V in power-down mode introduced its own grounded network thru R17. In this configuration MOSFET voltage shifter was doing its job keeping MISO line down all the time when SPI slave was powered off. That was serious flaw as I already dedicated hours of manufacturing 2-sided prototype board, so vision of redesigning this sucker from scratch made me really angry.
Hardware patch
NC7WZ07 does not pose shutdown problem, it is designed to go high-Z when power is off. I quickly started patchwork; I made up ~10x10mm board using single line of NC7WZ07 and stiched it to the board with 2-sided sticky tape and wires. It was first time I really applied physical patch into hardware. And it worked well!
This experience pushed me to another study of voltage converters just get headache of possibilities. I turned my eye on TXS/TXB converters from Texas Instruments and ordered bunch of TXS0102 for future experimental circuitry: this chip can work both in open-drain (with internal pullups, no extra resistors) as well as push-pull, it is bidirectional and has 2 lines. This is good choice for typical MCU peripherals lke 2-line I2C and UART (if flow control required 4 lines / 2 chips can be used). Also odd-numbered lines like 3-wire SPI is fine, usually other peripheral can be paired (like two SPI slaves, 6 lines and 3 chips). What was decisive factor, I got it dirt cheap so 4-line TXS0104 version was not considered any longer.
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